PCB trace width and current capacity calculator
Width required to carry a current at a chosen temperature rise — with the resistance, drop and dissipation that come with it.
Required trace width
—mm
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The physics
A trace carrying current dissipates I²R along its length. That heat
leaves through the dielectric, along the copper, and — on an outer layer — into
the air. The conductor settles wherever generation balances loss. So "how wide
should this trace be" is really "how much cross-section do I need for that balance
to land where I want it."
The IPC-2221B relation
I = k · ΔT^0.44 · A^0.725
I current, amperes
ΔT temperature rise above ambient, °C
A cross-sectional area, mil²
k 0.048 external layers · 0.024 internal layersRearranged for the quantity you actually want:
A = ( I / (k · ΔT^0.44) )^(1/0.725)
width = A / copper thicknessThose exponents are empirical — fitted to measured data rather than derived from first principles. Worth knowing, because it means the relation interpolates well inside the range it was fitted over and extrapolates poorly outside it.
Resistance and drop
R = ρ(T) · L / A ρ₂₀ = 1.72 × 10⁻⁸ Ω·m
ρ(T) = ρ₂₀ · (1 + α · (T − 20)) α = 0.00393 /°CCopper resistance climbs about 0.4% per degree, so a hot trace drops more voltage and dissipates more, which makes it hotter still. This tool evaluates resistivity at the conductor temperature rather than at 20 °C, so the numbers describe the operating point instead of the datasheet one.
Where this stops being accurate
- IPC-2152 supersedes IPC-2221. The newer standard is chart-based and models substrate conductivity, board thickness and plane proximity. It generally permits narrower traces. Treat this as the conservative starting point.
- Neighbours are invisible to it. Two high-current traces side by side heat each other, and so does a regulator 5 mm away.
- Copper pours and thermal relief change the picture entirely — a trace entering a pour stops being the limiting element.
- Vias are not modeled, and a single barrel is frequently the real constraint.
- Still air is assumed. Forced convection raises capacity; a sealed enclosure lowers it.
- Etch factor leaves the finished conductor trapezoidal, so the true cross-section is slightly under the rectangular figure used here.
A working rule
Size for a 10 °C rise, then look at what the number becomes at 20 °C. If the difference between the two changes your layout, the trace is marginal — give it more copper or give it a plane.
Design guidance, not a manufacturing instruction. Verify every result against your fabricator's stack-up and the applicable standard before release. Closed-form models are approximations; the fab's field solver and process window are the authority.
Questions
What people ask about this
Is this IPC-2221 or IPC-2152?
The maths is the IPC-2221B closed form, because that is the version with a published equation. IPC-2152 supersedes it and is chart-based — it has no single closed form, because it models substrate thermal conductivity, board thickness, plane proximity and whether the board sits in still or moving air. In practice IPC-2221 is the conservative answer: IPC-2152 usually permits a narrower trace for the same rise, sometimes substantially. Size a starting point here, then check the IPC-2152 charts for your specific stack-up if width is tight.
Why is an internal trace allowed so much less current?
Because it cannot convect. An external trace loses heat to air directly; an internal one has to conduct through the dielectric first, and FR-4 is a poor thermal conductor. IPC-2221 handles that with a constant roughly half the external value, which is a blunt instrument — the real answer depends on how close the nearest plane is, and that is exactly what IPC-2152 added.
What temperature rise should I design to?
Ten degrees is a common default for power traces and leaves margin. Twenty is acceptable where the board is not thermally crowded and the laminate is rated for it. Above thirty you are making a decision about laminate life rather than about copper, and you should check the glass transition temperature and what else is nearby before accepting it.
Does the result account for vias?
No. A via in a current path is a separate thermal and resistive element, and a single plated barrel often turns out to be the limiting component in an otherwise generous trace. Size the via count separately — the per-barrel figure is far lower than people expect for a continuous load.
Why does ambient temperature matter if the equation gives a rise?
Because the rise is above ambient, and what damages a laminate is the absolute conductor temperature. A 20 °C rise is comfortable at 25 °C ambient and is a problem inside a sealed enclosure sitting at 70 °C. Ambient is entered so the tool can show you the number that actually matters.
Sizing copper for a real thermal environment?
A closed form gives you a starting width. What it cannot see is the enclosure, the plane spacing, or what else is dissipating 5 mm away. Send us the stack-up and the ambient.