Embedded hardware design
The whole board: silicon selection, architecture, schematic, layout, RF, power and bring-up under one accountability.
Some projects need a specialist for one job. Others need somebody to own the whole board — decide the silicon, draw the architecture, route the high-speed interfaces, design the power, get it booting, and be answerable for all of it.
This is that engagement.
It starts with a trade study, not a schematic
The processor decision constrains everything downstream: what interfaces you get, what the board costs, how hot it runs, how long you can buy it, and which software ecosystem your team lives in for the next decade.
That decision deserves evidence. We inventory the requirements, score the realistic candidates against them, and hand you a ranked recommendation you can defend to your own stakeholders — including the case against the option we recommend.
Design houses that sell modules recommend the modules they sell. That is gravity rather than dishonesty, and it is why a vendor-neutral opinion is worth paying for. Occasionally the honest answer is “buy an off-the-shelf module and spend the NRE elsewhere.”
The disciplines this pulls together
High-speed digital. DDR3, DDR4 and LPDDR4 with fly-by topology and write levelling; MIPI CSI-2 and DSI; PCIe Gen2 and Gen3; USB 2.0 and 3.x; Gigabit Ethernet and RGMII. Every differential pair gets an impedance target and a stack-up that can hold it, confirmed with the fabricator before layout rather than after a DFM rejection.
RF and connectivity. Sub-GHz LoRa at 868 MHz, Wi-Fi 6 and Bluetooth LE, 5G and LTE modules, GNSS with RTK, AIS, and RF-PLC hybrids for grid applications. Fifty-ohm feed lines, keep-outs respected on every layer, ground stitching, and co-existence planned in the block diagram rather than discovered at pre-compliance.
Power. Buck and boost topologies, sequencing that meets each device’s power-up specification exactly, hold-up and graceful shutdown so a power loss mid-write does not corrupt storage, hot-plug inrush limiting, and current sensing with a measurement path you can actually trust.
Sensing. IMU integration with dual-source footprints and external clocking, camera pipelines, LiDAR and time-of-flight, mmWave radar, and the analogue front-ends that sit between a sensor and a usable number.
Bring-up. First power-on through bootloader to a booting system, then every interface proven against the schematic in order.
Why one team rather than four suppliers
Most embedded products need hardware, RF, power and enough firmware to demonstrate the board works. Split across four suppliers, the interfaces between them become the project’s weak point — and integration problems become nobody’s problem.
Under one accountability, the trade-offs get made in the open. The RF constraint that moves a connector, the power decision that changes the layer count, the firmware requirement that adds a test point: those conversations happen inside one team rather than across three contracts.
What you receive
A complete manufacturing dataset, native source files, documentation somebody else could pick up, and full IP transfer. Every time, in EU jurisdiction.
Common questions
Straight answers
How do you choose the processor?
By requirement, not by habit. Your interface list, throughput, thermal envelope, power budget, longevity requirement, software ecosystem and unit cost target go in; a ranked recommendation with the reasoning comes out. We have no module catalog and no vendor allegiance, so the trade study is genuinely open — Renesas RZ, ST STM32 and STM32MP, NXP i.MX, TI Sitara and AM62, Espressif, or a Jetson-class part when the inference load justifies it.
Where does hardware design stop and firmware start?
We design the hardware so the software can work, and we take it far enough to prove that: boot-mode strapping, memory map, accessible debug, bring-up through the bootloader, and MCU-class firmware for STM32 and ESP32 targets. Deep kernel work, production BSP maintenance, AUTOSAR and FPGA RTL are partnered rather than claimed.
Can you work alongside our existing engineering team?
Yes, and it is a common arrangement. We take the parts your team does not have capacity or specialism for — high-speed layout, RF integration, power design, an independent review — and work in your tools and your process.
What about long-term component availability?
It is designed in rather than discovered. Silicon gets chosen partly on the vendor's published longevity commitment; the BOM carries second-source footprints on anything with single-source risk, and the substitution rules are documented so purchasing can act without an engineering change.
Evidence
Where this has been applied
Hero: system architecture diagram as a clean vector drawing, not a photo. Sensors on the left, compute in the middle, bandwidth figures on the arrows. This case study's value is the thinking, so show the thinking.
Edge-compute architecture for an unmanned surface vessel
Three architectures compared on real bandwidth budgets, so the platform decision was made on evidence rather than TOPS figures.
Hero: Altium 3D render of the rigid-flex assembly in its folded, installed geometry. A flat board render sells none of the difficulty.
Flight-controller carrier for a tube-launched UAV
Teardown, clean-room re-implementation, and a rigid-flex carrier that fits inside a launch tube.
Hero: the sensor node installed in a ceiling or wall position, in a real room with real light. Context sells this one — a bare PCB says nothing about presence detection.
mmWave presence detection for building automation
Radar instead of PIR, because PIR cannot see a person sitting still.