Renesas RZ family board design
The silicon family we have the deepest production experience on — vision AI, industrial HMI and TSN networking, across modules and carriers.
Fit
When this is the right choice
Choose it when
- You need AI inference at the edge with a power budget that rules out a GPU
- Industrial temperature range and long-term availability matter
- You need TSN or industrial Ethernet natively rather than bolted on
- Vision processing is central and DRP-AI fits the model you are running
Look elsewhere when
- Your model needs more inference throughput than DRP-AI delivers — look at Jetson-class
- Your team already has deep i.MX or Sitara ecosystem investment
- You need a part with a broader community ecosystem for rapid prototyping
Engineering
What’s actually hard about it
The parts that decide whether it works on the first spin, and the parts that cost a respin when they are wrong.
DDR on a constrained footprint
Fly-by topology and write levelling inside Renesas tolerances, on a module-sized board with no routing room.
Power sequencing exactly to spec
The RZ family is specific about power-up ordering. Out of order, it does not boot — and it looks like a dead part.
Thermal under inference load
DRP-AI running is not the idle datasheet figure. Junction temperature has to be budgeted at real worst-case ambient.
Camera pipeline design
MIPI CSI-2 lane matching and a clean reference for the ISP, which is where most vision bring-up problems originate.
What we have built on it
Boards around RZ/V2L, RZ/V2M, RZ/V2MA, RZ/G2L and RZ/N2L across SMARC, OSM and LGA form factors, with matching carriers and evaluation platforms — including DDR fly-by routing and MIPI CSI-2 camera pipelines on this silicon.
Relevant services: System-on-Module design PCB design
Got a board to design — or one that won’t boot?
You talk to the engineer who would do the work. Reply within one business day, and we’ll sign your NDA before you go into detail.