Controlled impedance calculator
Microstrip, stripline and coplanar waveguide. Solve for the width you need, or the impedance you already have.
Required trace width
—mm
—
The physics
A trace over a reference plane is a transmission line. Its characteristic impedance is set by the capacitance per unit length to that plane and the inductance per unit length of the loop the signal and its return current enclose — which is to say, by geometry and by the dielectric between them. Nothing else. Not the copper's conductivity, not the signal, not the driver.
Microstrip — Hammerstad-Jensen
εeff = (εr+1)/2 + (εr−1)/2 · (1 + 12h/w)^−0.5
w/h ≤ 1: Z₀ = (60/√εeff) · ln(8h/w + w/(4h))
w/h ≥ 1: Z₀ = (120π/√εeff) / [ w/h + 1.393 + 0.667·ln(w/h + 1.444) ]Two branches, because a narrow trace and a wide one behave differently. The older IPC-2141 single logarithm is simpler and noticeably less accurate below w/h = 1, which is exactly where fine-pitch designs live.
Stripline
Z₀ = (60/√εr) · ln( 4b / (0.67π · (0.8w + t)) ) b = 2h
Buried between two planes, so there is no air above and no εeff
correction — the field sees only the laminate. That is also why stripline is
slower: propagation delay scales with √εr, and here εr is the full value.
Coplanar waveguide with ground
k₁ = w / (w + 2g)
k₂ = tanh(πw/4h) / tanh(π(w+2g)/4h)
q = [K(k₂)/K′(k₂)] / [K(k₁)/K′(k₁)]
εeff = (1 + εr·q) / (1 + q)
Z₀ = (60π/√εeff) / [ K(k₁)/K′(k₁) + K(k₂)/K′(k₂) ] K is the complete elliptic integral of the first kind; the ratio
is evaluated with Hilberg's closed-form approximation, accurate to better
than three parts in ten thousand. CPWG confines the field between the trace
and its adjacent grounds, which is why it couples less to neighbours — and
why those grounds must be stitched to the plane or the model stops applying.
Differential
microstrip: Z_diff ≈ 2·Z₀ · (1 − 0.48·e^(−0.96·s/h))
stripline: Z_diff ≈ 2·Z₀ · (1 − 0.347·e^(−2.9·s/h))Two coupled lines are not two independent lines. The closer they run, the more the odd-mode field of one lowers the impedance seen by the other — which is why differential impedance is always less than twice the single-ended value, and why "just double it" produces a pair that is too wide.
Propagation delay
t_pd = √εeff / c ≈ 3.336 · √εeff ps/mmWhere this stops being accurate
- Solder mask over a microstrip lowers impedance by roughly 1–2 Ω. Not modelled here; your fabricator models it.
- Copper roughness matters above a few gigahertz and is invisible to every closed form.
- Glass-weave skew affects tight differential pairs on coarse weaves — a real problem for long parallel runs.
- εr falls with frequency and the datasheet figure is quoted at one point. Above 1 GHz, ask for the dispersion data.
- Etch factor leaves a trapezoidal conductor, so the real cross-section differs from the rectangle assumed here.
- Plane discontinuities matter more than any of the above. A perfectly dimensioned trace crossing a split is not a controlled-impedance trace.
Design guidance, not a manufacturing instruction. Verify every result against your fabricator's stack-up and the applicable standard before release. Closed-form models are approximations; the fab's field solver and process window are the authority.
Questions
What people ask about this
Which equations does this use?
Hammerstad-Jensen for microstrip, which is materially more accurate than the older IPC-2141 logarithmic form, especially at width-to-height ratios below one. Wheeler-derived closed form for stripline. Conformal mapping with the Hilberg approximation to the elliptic integral ratio for coplanar waveguide. Differential impedance uses the standard exponential coupling terms. Every one of them is printed below the calculator.
Why is my fabricator quoting a different width?
Because they run a 2D field solver on your actual stack-up, and they model things a closed form cannot: solder mask over the trace, copper surface roughness, etch factor leaving a trapezoidal cross-section, and the resin content of the specific prepreg. Solder mask alone typically pulls a microstrip down by one to two ohms. Treat this tool as the number you take into that conversation, not the number you release to fabrication.
What tolerance should I expect?
Ten percent is the standard controlled-impedance offering from most fabricators, and it is what the shaded band on the chart shows. Some will hold seven percent for a premium and a coupon. Below that you are into specialist territory with test coupons on every panel. If your design only works at five percent, the design is the problem.
Should I use coplanar waveguide?
On an outer layer where you need a tight, well-defined reference and you have ground pour available, CPWG gives better field confinement and less coupling to neighbours than plain microstrip. The cost is stitching: the coplanar grounds must be tied to the reference plane with vias at intervals well under a quarter wavelength at your highest frequency of concern, or the structure stops behaving as modelled.
Why does copper weight change the answer?
Thicker copper adds capacitance from the trace sidewalls, which lowers impedance, so a thicker trace has to be narrower to hit the same target. Going from one to two ounce copper typically narrows a 50 Ω microstrip by several thousandths of an inch — enough to matter at fine geometries and enough to catch you out if you change copper weight late.
Impedance you assumed is not impedance you have.
The stack-up decides what the board can do, and the fabricator decides what the stack-up can be. Send us the layer count and the interfaces — we'll tell you what is achievable before you route.